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1 lt1498/LT1499 10mhz, 6v/ m s, dual/quad rail-to-rail input and output precision c-load op amps features n rail-to-rail input and output n 475 m v max v os from v + to v C n gain-bandwidth product: 10mhz n slew rate: 6v/ m s n low supply current per amplifier: 1.7ma n input offset current: 50na max n input bias current: 500na max n open-loop gain: 1000v/mv min n low input noise voltage: 12nv/ ? hz typ n wide supply range: 2.2v to 15v n large output drive current: 30ma n stable for capacitive loads up to 10,000pf n dual in 8-pin pdip and so package n quad in narrow 14-pin so descriptio n u the lt ? 1498/LT1499 are dual/quad, rail-to-rail input and output precision c-load tm op amps with a 10mhz gain- bandwidth product and a 6v/ m s slew rate. the lt1498/LT1499 are designed to maximize input dynamic range by delivering precision performance over the full supply voltage. using a patented technique, both input stages of the lt1498/LT1499 are trimmed, one at the negative supply and the other at the positive supply. the resulting guaranteed common mode rejection is much better than other rail-to-rail input op amps. when used as a unity-gain buffer in front of single supply 12-bit a-to-d converters, the lt1498/LT1499 are guaranteed to add less than 1lsb of error even in single 3v supply systems. with 110db of supply rejection, the lt1498/LT1499 main- tain their performance over a supply range of 2.2v to 36v and are specified for 3v, 5v and 15v supplies. the inputs can be driven beyond the supplies without damage or phase reversal of the output. these op amps remain stable while driving capacitive loads up to 10,000pf. the lt1498 is available with the standard dual op amp configuration in 8-pin pdip and so packaging. the LT1499 features the standard quad op amp configuration and is available in a 14-pin plastic so package. these devices can be used as plug-in replacements for many standard op amps to improve input/output range and precision. typical applicatio n u frequency response frequency (hz) 100 gain (db) ?0 ?0 ?0 10 1m 1498 ta02 ?0 ?0 ?0 ?0 ?0 0 ?0 100 110 1k 10k 100k 10m v in = 2.7v p-p v + = 3v + 1/2 lt1498 6.81k v in v + /2 v + v out 1498 ta01 330pf 11.3k 6.81k + 1/2 lt1498 5.23k 47pf 1000pf 10.2k 5.23k 100pf single supply 100khz 4th order butterworth filter applicatio n s u n driving a-to-d converters n active filters n rail-to-rail buffer amplifiers n low voltage signal processing n battery-powered systems , ltc and lt are registered trademarks of linear technology corporation. c-load is a trademark of linear technology corporation.
2 lt1498/LT1499 absolute m axi m u m ratings w ww u total supply voltage (v + to v C ) ............................. 36v input current ..................................................... 10ma output short-circuit duration (note 1) ........ continuous operating temperature range ............... C 40 c to 85 c specified temperature range (note 3) .... C 40 c to 85 c junction temperature .......................................... 150 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c electrical characteristics consult factory for military and industrial grade parts. package/order i n for m atio n w u u order part number lt1498cn8 lt1498cs8 order part number top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 9 8 outa in a + in a v + + in b in b out b out d in d + in d v + in c in c out c a d b c t jmax = 150 c, q ja = 150 c/ w t jmax = 150 c, q ja = 130 c/ w (n8) t jmax = 150 c, q ja = 190 c/ w (s8) 1 2 3 4 8 7 6 5 top view out a in a + in a v v + out b in b + in b s8 package 8-lead plastic so n8 package 8-lead pdip a b LT1499cs t a = 25 c, v s = 5v,0v; v s = 3v,0v; v cm = v out = half supply, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage v cm = v + 150 475 m v v cm = v C 150 475 m v d v os input offset voltage shift v cm = v C to v + 150 425 m v input offset voltage match (channel-to-channel) v cm = v + , v C (note 4) 200 750 m v i b input bias current v cm = v + 0 250 500 na v cm = v C C 500 C 250 0 na d i b input bias current shift v cm = v C to v + 500 1000 na input bias current match (channel-to-channel) v cm = v + (note 4) 0 10 100 na v cm = v C (note 4) C 100 C 10 0 na i os input offset current v cm = v + 550 na v cm = v C 550 na d i os input offset current shift v cm = v C to v + 10 100 na input noise voltage 0.1hz to 10hz 400 nv p-p e n input noise voltage density f = 1khz 12 nv/ ? hz i n input noise current density f = 1khz 0.3 pa/ ? hz c in input capacitance 5pf a vol large-signal voltage gain v s = 5v, v o = 75mv to 4.8v, r l = 10k 600 3800 v/mv v s = 3v, v o = 75mv to 2.8v, r l = 10k 500 2000 v/mv s8 part marking 1498
3 lt1498/LT1499 symbol parameter conditions min typ max units v os input offset voltage v cm = v + l 175 650 m v v cm = v C + 0.1v l 175 650 m v v os tc input offset voltage drift (note 2) l 0.5 2.5 m v/ c v cm = v + l 1.5 4.0 m v/ c d v os input offset voltage shift v cm = v C + 0.1v to v + l 170 600 m v input offset voltage match (channel-to-channel) v cm = v C + 0.1v, v + (note 4) l 200 900 m v i b input bias current v cm = v + l 0 275 600 na v cm = v C + 0.1v l C 600 C 275 0 na d i b input bias current shift v cm = v C + 0.1v to v + l 550 1200 na input bias current match (channel-to-channel) v cm = v + (note 4) l 0 15 170 na v cm = v C + 0.1v (note 4) l C 170 C 15 0 na i os input offset current v cm = v + l 10 85 na v cm = v C + 0.1v l 10 85 na d i os input offset current shift v cm = v C + 0.1v to v + l 20 170 na a vol large-signal voltage gain v s = 5v, v o = 75mv to 4.8v, r l = 10k l 500 2500 v/mv v s = 3v, v o = 75mv to 2.8v, r l = 10k l 400 2000 v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C + 0.1v to v + l 78 89 db v s = 3v, v cm = v C + 0.1v to v + l 73 85 db cmrr match (channel-to-channel) (note 4) v s = 5v, v cm = v C + 0.1v to v + l 74 90 db v s = 3v, v cm = v C + 0.1v to v + l 69 86 db psrr power supply rejection ratio v s = 2.3v to 12v, v cm = v o = 0.5v l 86 102 db psrr match (channel-to-channel) (note 4) v s = 2.3v to 12v, v cm = v o = 0.5v l 80 102 db electrical characteristics t a = 25 c, v s = 5v,0v; v s = 3v,0v; v cm = v out = half supply, unless otherwise noted. symbol parameter conditions min typ max units cmrr common mode rejection ratio v s = 5v, v cm = v C to v + 81 90 db v s = 3v, v cm = v C to v + 76 86 db cmrr match (channel-to-channel) (note 4) v s = 5v, v cm = v C to v + 75 91 db v s = 3v, v cm = v C to v + 70 86 db psrr power supply rejection ratio v s = 2.2v to 12v, v cm = v o = 0.5v 88 105 db psrr match (channel-to-channel) (note 4) v s = 2.2v to 12v, v cm = v o = 0.5v 82 103 db v ol output voltage swing (low) (note 5) no load 14 30 mv i sink = 0.5ma 35 70 mv i sink = 2.5ma 90 200 mv v oh output voltage swing (high) (note 5) no load 2.5 10 mv i source = 0.5ma 50 100 mv i source = 2.5ma 140 250 mv i sc short-circuit current v s = 5v 12.5 24 ma v s = 3v 12.0 19 ma i s supply current per amplifier 1.7 2.2 ma gbw gain-bandwidth product (note 6) 6.8 10.5 mhz sr slew rate (note 7) v s = 5v, a v = C 1, r l = open, v o = 4v 2.6 4.5 v/ m s v s = 3v, a v = C 1, r l = open 2.3 4.0 v/ m s 0 c < t a < 70 c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted.
4 lt1498/LT1499 electrical characteristics symbol parameter conditions min typ max units v ol output voltage swing (low) (note 5) no load l 17 35 mv i sink = 0.5ma l 40 80 mv i sink = 2.5ma l 110 220 mv v oh output voltage swing (high) (note 5) no load l 3.5 15 mv i source = 0.5ma l 55 120 mv i source = 2.5ma l 160 300 mv i sc short-circuit current v s = 5v l 12 23 ma v s = 3v l 10 20 ma i s supply current per amplifier l 1.9 2.6 ma gbw gain-bandwidth product (note 6) l 6.1 9 mhz sr slew rate (note 7) v s = 5v, a v = C1, r l = open, v o = 4v l 2.5 4.0 v/ m s v s = 3v, a v = C1, r l = open l 2.2 3.5 v/ m s 0 c < t a < 70 c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. C40 c < t a < 85 c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. (note 3) symbol parameter conditions min typ max units v os input offset voltage v cm = v + l 250 750 m v v cm = v C + 0.1v l 250 750 m v v os tc input offset voltage drift (note 2) l 0.5 2.5 m v/ c v cm = v + l 1.5 4.0 m v/ c d v os input offset voltage shift v cm = v C + 0.1v to v + l 250 650 m v input offset voltage match (channel-to-channel) v cm = v C + 0.1v, v + (note 4) l 300 1500 m v i b input bias current v cm = v + l 0 350 750 na v cm = v C + 0.1v l C 750 C 350 0 na d i b input bias current shift v cm = v C + 0.1v to v + l 700 1500 na input bias current match (channel-to-channel) v cm = v + (note 4) l 0 30 180 na v cm = v C + 0.1v (note 4) l C 180 C 30 0 na i os input offset current v cm = v + l 15 90 na v cm = v C + 0.1v l 15 90 na d i os input offset current shift v cm = v C + 0.1v to v + l 30 180 na a vol large-signal voltage gain v s = 5v, v o = 75mv to 4.8v, r l = 10k l 400 2500 v/mv v s = 3v, v o = 75mv to 2.8v, r l = 10k l 300 2000 v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C + 0.1v to v + l 77 86 db v s = 3v, v cm = v C + 0.1v to v + l 73 81 db cmrr match (channel-to-channel) (note 4) v s = 5v, v cm = v C + 0.1v to v + l 72 86 db v s = 3v, v cm = v C + 0.1v to v + l 69 83 db psrr power supply rejection ratio v s = 2.5v to 12v, v cm = v o = 0.5v l 86 100 db psrr match (channel-to-channel) (note 4) v s = 2.5v to 12v, v cm = v o = 0.5v l 80 100 db v ol output voltage swing (low) (note 5) no load l 18 40 mv i sink = 0.5ma l 45 80 mv i sink = 2.5ma l 110 220 mv v oh output voltage swing (high) (note 5) no load l 3.5 15 mv i source = 0.5ma l 60 120 mv i source = 2.5ma l 170 300 mv
5 lt1498/LT1499 electrical characteristics C40 c < t a < 85 c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. (note 3) symbol parameter conditions min typ max units i sc short-circuit current v s = 5v l 7.5 15 ma v s = 3v l 7.5 15 ma i s supply current per amplifier l 2.0 2.7 ma gbw gain-bandwidth product (note 6) l 5.8 8.5 mhz sr slew rate (note 7) v s = 5v, a v = C1, r l = open, v o = 4v l 2.2 3.6 v/ m s v s = 3v, a v = C1, r l = open l 1.9 3.2 v/ m s t a = 25 c, v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage v cm = v + 200 800 m v v cm = v C 200 800 m v d v os input offset voltage shift v cm = v C to v + 150 650 m v input offset voltage match (channel-to-channel) v cm = v + , v C (note 4) 250 1400 m v i b input bias current v cm = v + 0 250 550 na v cm = v C C 550 C 250 0 na d i b input bias current shift v cm = v C to v + 500 1100 na input bias current match (channel-to-channel) v cm = v + (note 4) 0 12 120 na v cm = v C (note 4) C 120 C 12 0 na i os input offset current v cm = v + 660 na v cm = v C 660 na d i os input offset current shift v cm = v C to v + 12 120 na input noise voltage 0.1hz to 10hz 400 nv p-p e n input noise voltage density f = 1khz 12 nv/ ? hz i n input noise current density f = 1khz 0.3 pa/ ? hz a vol large-signal voltage gain v o = C 14.5v to 14.5v, r l = 10k 1000 5200 v/mv v o = C 10v to 10v, r l = 2k 500 2300 v/mv channel separation v o = C 10v to 10v, r l = 2k 116 130 db cmrr common-mode rejection ratio v cm = v C to v + 93 106 db cmrr match (channel-to-channel) (note 4) v cm = v C to v + 87 103 db psrr power supply rejection ratio v s = 5v to 15v 89 110 db psrr match (channel-to-channel) (note 4) v s = 5v to 15v 83 105 db v ol output voltage swing (low) (note 5) no load 18 30 mv i sink = 0.5ma 40 80 mv i sink = 10ma 230 500 mv v oh output voltage swing (high) (note 5) no load 2.5 10 mv i sink = 0.5ma 55 120 mv i sink = 10ma 420 800 mv i sc short-circuit current 15 30 ma i s supply current per amplifier 1.8 2.5 ma gbw gain-bandwidth product (note 6) 6.8 10.5 mhz sr slew rate a v = C 1, r l = open, v o = 10v 3.5 6 v/ m s measure at v o = 5v
6 lt1498/LT1499 electrical characteristics 0 c < t a < 70 c, v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage v cm = v + l 200 900 m v v cm = v C + 0.1v l 200 900 m v v os tc input offset voltage drift (note 2) l 1.0 3.5 m v/ c v cm = v + l 2.0 5.0 m v/ c d v os input offset voltage shift v cm = v C + 0.1v to v + l 200 750 m v input offset voltage match (channel-to-channel) v cm = v C + 0.1v, v + (note 4) l 350 1500 m v i b input bias current v cm = v + l 0 300 675 na v cm = v C + 0.1v l C 675 C 300 0 na d i b input bias current shift v cm = v C + 0.1v to v + l 600 1350 na input bias current match (channel-to-channel) v cm = v + (note 4) l 0 20 180 na v cm = v C + 0.1v (note 4) l C 180 C 20 0 na i os input offset current v cm = v + l 15 90 na v cm = v C + 0.1v l 15 90 na d i os input offset current shift v cm = v C + 0.1v to v + l 30 180 na a vol large-signal voltage gain v o = C 14.5v to 14.5v, r l = 10k l 900 5000 v/mv v o = C 10v to 10v, r l = 2k l 400 2000 v/mv channel separation v o = C 10v to 10v, r l = 2k l 112 125 db cmrr common mode rejection ratio v cm = v C + 0.1v to v + l 92 103 db cmrr match (channel-to-channel) (note 4) v cm = v C + 0.1v to v + l 86 103 db psrr power supply rejection ratio v s = 5v to 15v l 88 103 db psrr match (channel-to-channel) (note 4) v s = 5v to 15v l 82 103 db v ol output voltage swing (low) (note 5) no load l 18 40 mv i sink = 0.5ma l 45 90 mv i sink = 10ma l 270 520 mv v oh output voltage swing (high) (note 5) no load l 3.5 15 mv i source = 0.5ma l 60 120 mv i source = 10ma l 480 1000 mv i sc short-circuit current l 12 28 ma i s supply current per amplifier l 1.9 2.8 ma gbw gain-bandwidth product (note 6) l 6.1 9 mhz sr slew rate a v = C 1, r l = open, v o = 10v l 3.4 5.3 v/ m s measured at v o = 5v
7 lt1498/LT1499 symbol parameter conditions min typ max units v os input offset voltage v cm = v + l 300 950 m v v cm = v C + 0.1v l 300 950 m v v os tc input offset voltage drift (note 2) l 1.0 3.5 m v/ c v cm = v + l 2.0 5.0 m v/ c d v os input offset voltage shift v cm = v C + 0.1v to v + l 250 850 m v input offset voltage match (channel-to-channel) v cm = v C + 0.1v, v + (note 4) l 350 1800 m v i b input bias current v cm = v + l 0 350 800 na v cm = v C + 0.1v l C 800 C 350 0 na d i b input bias current shift v cm = v C + 0.1v to v + l 700 1600 na input bias current match (channel-to-channel) v cm = v + (note 4) l 0 20 200 na v cm = v C + 0.1v (note 4) l C 200 C 20 0 na i os input offset current v cm = v + l 15 100 na v cm = v C + 0.1v l 15 100 na d i os input offset current shift v cm = v C + 0.1v to v + l 30 200 na a vol large-signal voltage gain v o = C 14.5v to 14.5v, r l = 10k l 800 5000 v/mv v o = C 10v to 10v, r l = 2k l 350 2000 v/mv channel separation v o = C 10v to 10v, r l = 2k l 110 120 db cmrr common mode rejection ratio v cm = v C + 0.1v to v + l 90 101 db cmrr match (channel-to-channel) (note 4) v cm = v C + 0.1v to v + l 86 100 db psrr power supply rejection ratio v s = 5v to 15v l 88 100 db psrr match (channel-to-channel) (note 4) v s = 5v to 15v l 82 100 db v ol output voltage swing (low) (note 5) no load l 25 50 mv i sink = 0.5ma l 50 100 mv i sink = 10ma l 275 520 mv v oh output voltage swing (high) (note 5) no load l 3.5 15 mv i source = 0.5ma l 65 120 mv i source = 10ma l 500 1000 mv i sc short-circuit current l 10 18 ma i s supply current per amplifier l 2.0 3.0 ma gbw gain-bandwidth product (note 6) l 5.8 8.5 mhz sr slew rate a v = C 1, r l = open, v o = 10v, l 3 4.75 v/ m s measure at v o = 5v electrical characteristics C40 c < t a < 85 c, v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. (note 3) note 4: matching parameters are the difference between amplifiers a and d and between b and c on the LT1499; between the two amplifiers on the lt1498. note 5: output voltage swings are measured between the output and power supply rails. note 6: v s = 3v, v s = 15v gbw limit guaranteed by correlation to 5v tests. note 7: v s = 3v, v s = 5v slew rate limit guaranteed by correlation to 15v tests. the l denotes specifications that apply over the full operating temperature range. note 1: a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. note 2: this parameter is not 100% tested. note 3: the lt1498/LT1499 are designed, characterized and expected to meet these extended temperature limits, but are not tested at C 40 c and 85 c. guaranteed i grade parts are available, consult factory.
8 lt1498/LT1499 typical perfor m a n ce characteristics u w input offset voltage ( m v) 500 percent of units (%) 15 20 25 300 1498/99 g01 10 5 0 300 100 100 500 lt1498: n8, s8 packages LT1499: s14 package v s = 5v, 0v v cm = 0v input offset voltage ( m v) 500 percent of units (%) 15 20 25 300 1498/99 g02 10 5 0 300 100 100 500 lt1498: n8, s8 packages LT1499: s14 package v s = 5v, 0v v cm = 0v to 5v input offset voltage ( m v) 500 percent of units (%) 15 20 25 300 1498/99 g02 10 5 0 300 100 100 500 lt1498: n8, s8 packages LT1499: s14 package v s = 5v, 0v v cm = 5v supply current vs supply voltage input bias current vs common mode voltage supply current vs temperature total supply voltage (v) 0 supply current per amplifier (ma) 1.0 1.5 32 1498/99 g04 0.5 0 8 16 24 436 12 20 28 2.0 t a = 125 c t a = 25 c t a = 55 c temperature ( c) ?0 supply current per amplifier (ma) 25 1498/99 g05 1.0 0.5 ?5 0 50 0 2.0 1.5 75 100 125 v s = 15v v s = 5v, 0v common mode voltage (v) ? input bias current (na) 0 200 23456 1498/99 g06 200 400 ? 0 1 400 ?00 100 300 300 v s = 5v, 0v t a = 125 c t a = 25 c t a = 55 c output saturation voltage vs load current (output low) temperature ( c) ?0 input bias current (na) 400 300 200 100 0 ?00 200 300 400 70 1498/99 g07 ?0 10 40 ?5 85 ? 25 55 100 v s = 5v, 0v v cm = 5v v s = 5v, 0v v cm = 0v v s = 15v v cm = 15v v s = 15v v cm = 15v npn active pnp active input bias current vs temperature output saturation voltage vs load current (output high) load current (ma) 10 saturation voltage (mv) 100 0.001 0.1 1 10 1498/99 g08 1 0.01 1000 t a = 55 c t a = 25 c t a = 125 c load current (ma) 10 saturation voltage (mv) 100 0.001 0.1 1 10 1498/99 g09 1 0.01 1000 t a = 55 c t a = 25 c t a = 125 c v os distribution, v cm = 0v (pnp stage) v os distribution v cm = 5v (npn stage) d v os shift for v cm = 0v to 5v
9 lt1498/LT1499 typical perfor m a n ce characteristics u w minimum supply voltage total supply voltage (v) 1 0 change in offset voltage ( m v) 50 100 150 200 23 4 5 1498/99 g10 250 300 t a = 85 c t a = 25 c t a = 70 c nonfunctional t a = 55 c noise voltage spectrum frequency (hz) 1 80 noise voltage (nv/ ? hz) 100 120 140 160 10 100 1000 1498/99 g12 60 40 20 0 180 200 v s = 5v, 0v v cm = 2.5v pnp active v cm = 4v npn active noise current spectrum frequency (hz) 1 4 current noise (pa/ ? hz) 5 6 7 8 10 100 1000 1498/99 g13 3 2 1 0 9 10 v s = 5v, 0v v cm = 2.5v pnp active v cm = 4v npn active cmrr vs frequency frequency (khz) 40 common mode rejection ratio (db) 60 80 70 100 120 30 50 90 110 1 100 1000 10000 1498/99 g15 20 10 v s = 15v v s = 2.5v gain and phase vs frequency frequency (mhz) ?0 voltage gain (db) phase shift (deg) 10 30 20 50 70 ?0 0 40 60 0.01 1 10 100 1498/99 g14 ?0 108 ?6 36 0 108 180 144 ?2 72 144 180 0.1 phase gain r l = 10k v s = 1.5v v s = 15v psrr vs frequency frequency (khz) 10 power supply rejection ratio (db) 30 50 40 70 90 0 20 60 80 1 100 1000 10000 1498/99 g16 ?0 10 v s = 2.5v positive supply negative supply channel separation vs frequency frequency (khz) 0.01 110 channel separation (db) 100 ?0 ?0 ?0 0.1 1 10 100 1000 1498/99 g18 120 130 140 150 ?0 ?0 v s = 15v v out = 1v p-p r l = 2k gain bandwidth and phase margin vs supply voltage total supply voltage (v) 0 0 gain bandwidth (mhz) phase margin (deg) 4 6 8 10 12 14 5 10 15 20 1498/99 g17 25 16 18 20 2 0 20 30 40 50 60 70 80 90 100 10 30 phase margin gain bandwidth 0.1hz to 10hz output voltage noise time (1s/div) 010 output voltage (200nv/div) 1498/99 g11 v s = 2.5v v cm = 0v
10 lt1498/LT1499 typical perfor m a n ce characteristics u w output step vs settling time to 0.01% settling time ( m s) 1.5 ?0 output step (v) ? ? ? 0 10 4 2.0 2.5 1498/99 g21 ? 6 8 2 3.0 3.5 v s = 15v noninverting inverting inverting noninverting slew rate vs supply voltage total supply voltage (v) 0 3 slew rate (v/ m s) 4 6 7 8 8 16 20 36 1498/99 g20 5 412 24 28 32 9 v out = 80% of v s a v = ? rising edge falling edge open-loop gain output voltage (v) 0 input voltage ( m v) ? 0 1 3 5 1498/99 g23 ? ? ? 12 4 2 3 4 6 v s = 5v, 0v r l = 2k r l = 10k warm-up drift vs time time after power-up (sec) 0 change in offset voltage ( m v) ?0 0 10 60 100 160 1498/99 g24 ?0 ?0 ?0 20 40 80 120 140 s8 package, v s = 2.5v s8 package, v s = 15v n8 package, v s = 15v LT1499cs, v s = 15v n8 package, v s = 2.5v LT1499cs, v s = 2.5v output voltage (v) ?0 15 input voltage ( m v) 0 10 20 1498/99 g22 ?0 ?0 ?0 5 05 10 15 20 ? 5 ?5 15 v s = 15v r l = 2k r l = 10k open-loop gain capacitive load handling capacitive load (pf) 20 overshoot (%) 50 70 40 10 1000 10000 100000 1498/99 g19 0 100 60 30 10 v s = 5v, 0v a v = 1 r l = 1k total harmonic distortion + noise vs peak-to-peak voltage input voltage (v p-p ) 0.001 thd + noise (%) 0.01 0.1 1 0234 0.0001 1 5 1498/99 g25 f = 1khz r l = 10k a v = 1 v s = 1.5v a v = 1 v s = 1.5v a v = 1 v s = 2.5v a v = 1 v s = 2.5v frequency (khz) 0.01 thd + noise (%) 0.01 0.1 1 0.1 1 10 100 1498/99 g26 0.001 v s = 1.5v v in = 2v p-p r l = 10k a v = 1 a v = ? total harmonic distortion + noise vs frequency
11 lt1498/LT1499 typical perfor m a n ce characteristics u w applicatio n s i n for m atio n wu u u rail-to-rail input and output the lt1498/LT1499 are fully functional for an input and output signal range from the negative supply to the posi- tive supply. figure 1 shows a simplified schematic of the amplifier. the input stage consists of two differential amplifiers, a pnp stage (q1/q2) and an npn stage (q3/ q4) which are active over different ranges of input com- mon mode voltage. a complementary common emitter output stage (q14/q15) is employed allowing the output to swing from rail-to-rail. the devices are fabricated on linear technologys proprietary complementary bipolar process to ensure very similar dc and ac characteristics for the output devices (q14/q15). the pnp differential input pair is active for input common mode voltages, v cm , between the negative supply to approximately 1.3v below the positive supply. as v cm moves further toward the positive supply, the transistor q5 will steer the tail current, i 1 , to the current mirror q6/ q7 activating the npn differential pair, and the pnp differential pair becomes inactive for the rest of the input common mode range up to the positive supply. the output is configured with a pair of complementary common emitter stages that enables the output to swing from rail to rail. capacitors c1 and c2 form local feedback loops that lower the output impedance at high frequencies. 5v small-signal response 5mv/div 200ns/div v s = 5v a v = 1 v in = 20mv p-p at 50khz r l = 1k 1498/99 g27 15v small-signal response 5mv/div 200ns/div 1498/99 g29 v s = 15v a v = 1 v in = 20mv p-p at 50khz r l = 1k 1v/div 5v large-signal response 2 m s/div v s = 5v a v = 1 v in = 4v p-p at 10khz r l = 1k 1498/99 g28 5v/div 15v large-signal response 2 m s/div v s = 15v a v = 1 v in = 20v p-p at 10khz r l = 1k 1498/99 g30
12 lt1498/LT1499 applicatio n s i n for m atio n wu u u figure 1. lt1498 simplified schematic diagram input offset voltage the offset voltage changes depending upon which input stage is active. the input offsets are random, but are trimmed to less than 475 m v. to maintain the precision characteristics of the amplifier, the change of v os over the entire input common mode range (cmrr) is guaranteed to be less than 425 m v on a single 5v supply. input bias current the input bias current polarity also depends on the input common mode voltage, as described in the previous section. when the pnp differential pair is active, the input bias currents flow out of the input pins; they flow in opposite direction when the npn input stage is active. the offset error due to input bias current can be minimized by equalizing the noninverting and inverting input source impedances. this will reduce the error since the input offset currents are much less than the input bias currents. overdrive protection to prevent the output from reversing polarity when the input voltage exceeds the power supplies, two pair of crossing diodes d1 to d4 are employed. when the input q4 q6 v bias d6 d5 +in d2 q3 q7 q1 i 1 q9 q2 d4 d1 d3 ?n out v v + q5 q12 q10 q8 q14 1498/99 f01 c1 r1 r6 r3 v c c r4 r5 c2 r2 q11 q13 q15 buffer and output bias r7 voltage exceeds either power supply by approximately 700mv, d1/d2 or d3/d4 will turn on, forcing the output to the proper polarity. for the phase reversal protection to work properly, the input current must be less than 5ma. if the amplifier is to be severely overdriven, an external resistor should be used to limit the overdrive current. furthermore, the lt1498/LT1499s input stages are pro- tected by a pair of back-to-back diodes, d5/d6. when a differential voltage of more than 0.7v is applied to the inputs, these diodes will turn on, preventing the zener breakdown of the input transistors. the current in d5/d6 should be limited to less than 10ma. internal resistors r6 and r7 (700 w total) limit the input current for differential input signals of 7v or less. for larger input levels, a resistor in series with either or both inputs should be used to limit the current. worst-case differential input voltage usually occurs when the output is shorted to ground. in addition, the amplifier is protected against esd strikes up to 3kv on all pins. capacitive load the lt1498/LT1499 are designed for ease of use. the amplifier can drive a capacitive load of more than 10nf
13 lt1498/LT1499 applicatio n s i n for m atio n wu u u without oscillation at unity gain. when driving a heavy capacitive load, the bandwidth is reduced to maintain stability. figures 2a and 2b illustrate the stability of the device for small-signal and large-signal conditions with capacitive loads. both the small-signal and large-signal transient response with a 10nf capacitive load are well behaved. feedback components to minimize the loading effect of feedback, it is possible to use the high value feedback resistors to set the gain. however, care must be taken to insure that the pole formed by the feedback resistors and the total input capacitance at the inverting input does not degrade the stability of the amplifier. for instance, the lt1498/LT1499 in a noninvert- ing gain of 2, set with two 30k resistors, will probably oscillate with 10pf total input capacitance (5pf input capacitance + 5pf board capacitance). the amplifier has a 2.5mhz crossing frequency and a 60 phase margin at 6db of gain. the feedback resistors and the total input capaci- tance create a pole at 1.06mhz that induces 67 of phase shift at 2.5mhz! the solution is simple, either lower the value of the resistors or add a feedback capacitor of 10pf of more. typical applicatio n s n u 1a voltage controlled current source 1a voltage controlled current sink + 1/2 lt1498 1k 500pf t r < 1 m s 1498/99 ta03 si9430dy v in v + r l 100 w 0.5 w 1k i out = i out v + ?v in 0.5 w 1k v in + 1/2 lt1498 500pf 1498/99 ta04 si9410dy v + v + r l i out 100 w 0.5 w 1k i out = v in 0.5 w t r < 1 m s figure 2b. lt1498 large-signal response v s = 5v a v = 1 1498/99 f02a c l = 10nf c l = 500pf c l = 0pf figure 2a. lt1498 small-signal response 1498/99 f02b v s = 5v a v = 1 c l = 0pf c l = 500pf c l = 10nf
14 lt1498/LT1499 typical applicatio n s n u input bias current cancellation + + 1m 1m cancellation amp signal amp 22pf input bias current less than 50na for 500mv v in (v + ?500mv) 1/2 lt1498 1/2 lt1498 r f v out 1498/99 ta05 v in r g n8 0695 0.005 (0.127) min 0.100 0.010 (2.540 0.254) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.130 0.005 (3.302 0.127) 0.015 (0.380) min 0.018 0.003 (0.457 0.076) 0.125 (3.175) min 12 3 4 87 6 5 0.255 0.015* (6.477 0.381) 0.400* (10.160) max 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.025 0.015 +0.635 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) n8 package 8-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) package descriptio n u dimensions in inches (millimeters) unless otherwise noted.
15 lt1498/LT1499 dimensions in inches (millimeters) unless otherwise noted. package descriptio n u information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) s package 14-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 0996 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 14 13 0.337 ?0.344* (8.560 ?8.738) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 5 6 7 8 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) s14 0695 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
16 lt1498/LT1499 14989f lt/tp 0397 7k ? printed in usa ? linear technology corporation 1996 related parts part number descripton comments ltc ? 1152 rail-to-rail input and output, zero-drift op amp high dc accuracy, 10 m v v os(max) , 100nv/ c drift, 1mhz gbw, 1v/ m s slew rate, max supply current 2.2ma lt1211/lt1212 dual/quad 14mhz, 7v/ m s, single supply precision op amps input common mode includes ground, 275 m v v os(max) , 6 m v/ c max drift, max supply current 1.8ma per op amp lt1213/lt1214 dual/quad 28mhz, 12v/ m s, single supply precision op amps input common mode includes ground, 275 m v v os(max) , 6 m v/ c max drift, max supply current 3.5ma per op amp lt1215/lt1216 dual/quad 23mhz, 50v/ m s, single supply precision op amps input common mode includes ground, 450 m v v os(max) , max supply current 6.6ma per op amp lt1366/lt1367 dual/quad precision, rail-to-rail input and output op amps 475 m v v os(max) , 400khz gbw, 0.13v/ m s slew rate, max supply current 520 m a per op amp lt1490/lt1491 dual/quad micropower, rail-to-rail input and output op amps max supply current 50 m a per op amp, 200khz gbw, 0.07v/ m s slew rate, operates with inputs 44v above v C independent of v + linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 l (408) 432-1900 fax: (408) 434-0507 l telex: 499-3977 l www.linear-tech.com typical applicatio n u bidirectional current sensor a bidirectional current sensor for battery-powered sys- tems is shown in figure 3. two outputs are provided: one proportional to charge current, the other proportional to discharge current. the circuit takes advantage of the lt1498s rail-to-rail input range and its output phase reversal protection. during the charge cycle, the op amp a1 forces a voltage equal to (i l )(r sense ) across r a . this voltage is then amplified at the charge out by the ratio of r b over r a . in this mode, the output of a2 remains high, keeping q2 off and the discharge out low, even though the (+) input of a2 exceeds the positive power supply. during the discharge cycle, a2 and q2 are active and the operation is similar to the charge cycle. + + a1 1/2 lt1498 a2 1/2 lt1498 q2 mtp23p06 v o = i l = 1v/a for r a = 1k, r b = 10k r sense discharge out charge out q1 mtp23p06 r a r b r b r a r a r a v battery v battery 1498/99 f03 discharge i l charge r a r sense 0.1 w r b () v o i l figure 3. bidirectional current sensor

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